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| author | Mounir IDRASSI <mounir.idrassi@idrix.fr> | 2025-01-26 16:21:13 +0100 |
|---|---|---|
| committer | Mounir IDRASSI <mounir.idrassi@idrix.fr> | 2025-01-26 16:21:13 +0100 |
| commit | 247c98d9548fead121e5314727782a4694bc0de3 (patch) | |
| tree | aa6dd3e77188705a9405ec406bb9bd4267c52476 /src/Crypto/cpu.c | |
| parent | 5ff256a53d30031d9500e38c699084efc6c3bd56 (diff) | |
| download | VeraCrypt-247c98d9548fead121e5314727782a4694bc0de3.tar.gz VeraCrypt-247c98d9548fead121e5314727782a4694bc0de3.zip | |
Implement SHA256 acceleration on ARM64 platforms using CPU instructions
Diffstat (limited to 'src/Crypto/cpu.c')
| -rw-r--r-- | src/Crypto/cpu.c | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/src/Crypto/cpu.c b/src/Crypto/cpu.c index 0f1ba54d..a5b5bb19 100644 --- a/src/Crypto/cpu.c +++ b/src/Crypto/cpu.c @@ -474,11 +474,15 @@ void DisableCPUExtendedFeatures () #include <sys/auxv.h> #ifndef HWCAP_AES # define HWCAP_AES (1 << 3) #endif +#ifndef HWCAP_SHA2 +# define HWCAP_SHA2 (1 << 6) +#endif #endif volatile int g_hasAESARM = 0; +volatile int g_hasSHA256ARM = 0; inline int CPU_QueryAES() { #if defined(CRYPTOPP_ARM_AES_AVAILABLE) @@ -502,10 +506,35 @@ inline int CPU_QueryAES() return 0; #endif } +inline int CPU_QuerySHA2() +{ +#if defined(CRYPTOPP_ARM_SHA2_AVAILABLE) +#if defined(__linux__) && defined(__aarch64__) + if ((getauxval(AT_HWCAP) & HWCAP_SHA2) != 0) + return 1; +#elif defined(__APPLE__) && defined(__aarch64__) + // Apple Sillcon (M1) and later + return 1; +#elif defined(_WIN32) && defined(_M_ARM64) +#ifdef TC_WINDOWS_DRIVER + if (ExIsProcessorFeaturePresent(PF_ARM_V8_CRYPTO_INSTRUCTIONS_AVAILABLE) != 0) + return 1; +#else + if (IsProcessorFeaturePresent(PF_ARM_V8_CRYPTO_INSTRUCTIONS_AVAILABLE) != 0) + return 1; +#endif +#endif + return 0; +#else + return 0; +#endif +} + void DetectArmFeatures() { g_hasAESARM = CPU_QueryAES(); + g_hasSHA256ARM = CPU_QuerySHA2(); } #endif
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