Age | Commit message (Collapse) | Author | Files | Lines |
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* wolfCrypt as crypto backend for VeraCrypt
* Refactor to use EncryptionModeWolfCryptXTS class
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* Crypto: fix warning mismatched bound
../Crypto/cpu.c:67:32: warning: argument 2 of type 'uint32[4]'
{aka 'unsigned int[4]'} with mismatched bound [-Warray-parameter=]
67 | int CpuId(uint32 input, uint32 output[4])
| ~~~~~~~^~~~~~~~~
In file included from ../Crypto/cpu.c:3:
../Crypto/cpu.h:236:33: note: previously declared as 'uint32 *'
{aka 'unsigned int *'}
236 | int CpuId(uint32 input, uint32 *output);
Signed-off-by: Vasiliy Kovalev <kovalev@altlinux.org>
* Core/Unix: fix warning ignoring return value
Unix/CoreUnix.cpp: In member function 'virtual std::shared_ptr<VeraCrypt:\
:VolumeInfo> VeraCrypt::CoreUnix::MountVolume(VeraCrypt::MountOptions&)':
Unix/CoreUnix.cpp:682:55: warning: ignoring return value of
'int chown(const char*, __uid_t, __gid_t)' declared with attribute
'warn_unused_result' [-Wunused-result]
682 | chown (mountPoint.c_str(), GetRealUserId(), GetRealGroupId());
| ~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Signed-off-by: Vasiliy Kovalev <kovalev@altlinux.org>
* Main/Forms: fix warning cast to pointer from integer of different size
Forms/MainFrame.cpp: In member function 'void VeraCrypt::MainFrame:\
:UpdateVolumeList()':
Forms/MainFrame.cpp:1718:106: warning: cast to pointer from integer of
different size [-Wint-to-pointer-cast]
1718 | Gui->InsertToListCtrl (SlotListCtrl, ++prevItemIndex,
fields, 0, (void *) volume->SlotNumber);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
Forms/MainFrame.cpp:1753:114: warning: cast to pointer from integer of
different size [-Wint-to-pointer-cast]
1753 | Gui->InsertToListCtrl (SlotListCtrl, ++prevItemIndex,
fields, 0, (void *) slotNumber);
| ^~~~~~~~~~~~~~~~~~~
Signed-off-by: Vasiliy Kovalev <kovalev@altlinux.org>
* Crypto: fix undefined behavior signed integer overflow
In function 'twofish_set_key':
cc1: warning: iteration 4 invokes undefined behavior
[-Waggressive-loop-optimizations]
../Crypto/Twofish.c:626:23: note: within this loop
626 | for (i = 0; i != 40; i += 2)
| ~~^~~~~
Signed-off-by: Vasiliy Kovalev <kovalev@altlinux.org>
---------
Signed-off-by: Vasiliy Kovalev <kovalev@altlinux.org>
Co-authored-by: Vasiliy Kovalev <kovalev@altlinux.org>
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We use correct define CRYPTOPP_BOOL_SSSE3_INTRINSICS_AVAILABLE
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algorithms RIPEMD-160 and GOST89.
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variable DISABLE_AESNI to 1 during build or passing NOAESNI=1 to make command
This comes following Github issue #892 and which should be solved thanks to this.
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compilation host
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System encryption still not implemented on ARM64
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version < 4.9 without -mssse3 option (SSSE3=1 when using make). (#507)
Compiling with -mxxx defines the corresponding macro of the intrinsics.
For example, -mssse3 defines __SSSE3__ macro to 1.
In GCC versions < 4.9, it is not possible to use and call x86 intrinsics only at runtime without
compiling the entire file with the -mxxx option.
For example, if we want to call SSSE3 intrinsics without compiling with -mssse3, the macro __SSSE3__ is not defined.
Therefore, when including <tmmintrin.h>, this results in "error "SSSE3 instruction set not enabled"" because of :
#ifndef __SSSE3__
# error "SSSE3 instruction set not enabled"
Since GCC 4.9, this has been fixed and it is possible to call x86 intrinsics from select functions in a file
that are tagged with the corresponding target attribute without having to compile the entire file with the -mxxx option.
This can be seen in <tmmintrin.h> which in recent versions (>= 4.9) contains :
#ifndef __SSSE3__
#pragma GCC push_options
#pragma GCC target("ssse3")
#define __DISABLE_SSSE3__
Since SSSE3 is only used under Windows for ChaCha256, this can be fixed by preceding '#include <tmmintrin.h>' with
#if defined (_MSC_VER) && !defined (TC_WINDOWS_BOOT).
See https://gcc.gnu.org/gcc-4.9/changes.html
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intrin.h header
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Stephan Mueller as a good alternative to RDRAND (http://www.chronox.de/jent.html, smueller@chronox.de)
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driver need of random bytes (currently only wipe bytes but more to come later).
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CPU features. Detect Hygon CPU as AMD one.
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CPUs always support SSE and SSE2
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disable CPU extended features in such case.
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work by Jussi Kivilinna (https://github.com/jkivilin/supercop-blockciphers). This improve speed by a factor of 2.5 when AES-NI supported by CPU and by 30% if AES-NI not supported.
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disabling inline assembly in this case (caused by http://llvm.org/bugs/show_bug.cgi?id=24232)
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gain factor. Update credits and copyrights notice.
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support (common files with DcsBoot)
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when needed.
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used by upcoming implementation)
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assembly code developed by Wei Dai
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