VeraCrypt
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2020-06-26Whirlpool: Remove unused "num" variable affectation in WHIRLPOOL_addMounir IDRASSI1-1/+0
2020-06-25Crypto: Fix random crash in Streebog in 32-bit, caused by use of aligned ↵Mounir IDRASSI1-8/+8
SSE2 instructions _mm_load_si128. Now we use _mm_loadu_si128 instead which is not slower than _mm_load_si128 on recent CPUs
2020-06-19Windows: remove duplicated function to detect AES-NI support in CPUMounir IDRASSI2-22/+2
2019-12-09Fix wrong check on the define CRYPTOPP_BOOL_X64Mounir IDRASSI1-1/+1
2019-12-09Linux/MacOSX: use x64 optimized SHA256 implementation instead of limiting it ↵Mounir IDRASSI1-1/+1
to Windows.
2019-12-09Add burn calls for temporary ss variable (#569)Hanno Böck1-0/+13
2019-12-09Linux: fix NOASM compilation (#563) (#568)alt3r 3go6-10/+10
Signed-off-by: alt3r 3go <alt3r.3go@protonmail.com>
2019-11-09Windows: include rdrand.h file only in Windows case since it is not yet ↵Mounir IDRASSI1-0/+2
included for other OSes
2019-11-07Windows: fix driver build error caused by missing headerMounir IDRASSI1-0/+5
2019-11-03Linux/MacOSX: Fix build error caused by RDRAND_getBytes/RDSEED_getBytes ↵Mounir IDRASSI1-1/+1
implemented only on Windows
2019-11-02Windows: when building for EFI bootloader, don't make calls to RDRAND/RDSEED ↵Mounir IDRASSI1-1/+2
functions since we don't link against their implementation in EFI bootloader
2019-10-30Update Jitterentropy Library to version 2.2.0Mounir IDRASSI3-183/+331
2019-10-30Disable both RDRAND and RDSEED if a failure is detectedMounir IDRASSI1-0/+13
2019-10-30Add check for buggy RDRAND (AMD Ryzen CPU case) even if we always use RDSEED ↵Mounir IDRASSI1-0/+13
instead of RDRAND when RDSEED is available (which is the case on modern CPUs)
2019-10-30Windows: use separate assembly files for RDRAND and RDSEED in order to fix a ↵Mounir IDRASSI6-228/+291
mysterious crash when MASM_RDSEED_GenerateBlock is called after MASM_RDRAND_GenerateBlock.
2019-10-29Fix wrong detection of AMD CPUs.Mounir IDRASSI1-2/+2
2019-10-28Linux: Fix compilation error on non-x86 platform by providing generic ↵Mounir IDRASSI1-0/+25
implementation for jent_get_nstime function
2019-10-28Linux: Fix compilation error if type __u64 is already defined by gccMounir IDRASSI1-5/+3
This is the case with Mageia Cauldron which has gcc 9.2.1
2019-10-24Linux/MacOSX: Better approach to avoid that jitterentropy code is optimized ↵Mounir IDRASSI1-1/+5
by the compiler
2019-10-23Linux/MacOSX: Add missing JitterEntropy implementationMounir IDRASSI1-4/+13
2019-10-17Linux: Workaround for gcc 4.4.7 bug under CentOS 6 that causes VeraCrypt ↵Mounir IDRASSI1-0/+14
built under CentOS 6 to crash when Whirlpool hash is used.
2019-10-04Fix "error "SSSE3 instruction set not enabled" when compiling using GCC ↵El Mostafa Idrassi1-0/+2
version < 4.9 without -mssse3 option (SSSE3=1 when using make). (#507) Compiling with -mxxx defines the corresponding macro of the intrinsics. For example, -mssse3 defines __SSSE3__ macro to 1. In GCC versions < 4.9, it is not possible to use and call x86 intrinsics only at runtime without compiling the entire file with the -mxxx option. For example, if we want to call SSSE3 intrinsics without compiling with -mssse3, the macro __SSSE3__ is not defined. Therefore, when including <tmmintrin.h>, this results in "error "SSSE3 instruction set not enabled"" because of : #ifndef __SSSE3__ # error "SSSE3 instruction set not enabled" Since GCC 4.9, this has been fixed and it is possible to call x86 intrinsics from select functions in a file that are tagged with the corresponding target attribute without having to compile the entire file with the -mxxx option. This can be seen in <tmmintrin.h> which in recent versions (>= 4.9) contains : #ifndef __SSSE3__ #pragma GCC push_options #pragma GCC target("ssse3") #define __DISABLE_SSSE3__ Since SSSE3 is only used under Windows for ChaCha256, this can be fixed by preceding '#include <tmmintrin.h>' with #if defined (_MSC_VER) && !defined (TC_WINDOWS_BOOT). See https://gcc.gnu.org/gcc-4.9/changes.html
2019-10-02Align section types of Whirlpool_C and SHA256_K (#479)Hans-Peter Jansen1-1/+1
in order to fix LTO linking. After switching to LTO for openSUSE Tumbleweed, veracrypt build failed with: [ 185s] ../Crypto/Whirlpool.c:105:45: error: 'Whirlpool_C' causes a section type conflict with 'SHA256_K' [ 185s] 105 | CRYPTOPP_ALIGN_DATA(16) static const uint64 Whirlpool_C[8*256+R] CRYPTOPP_SECTION_ALIGN16 = { [ 185s] | ^ [ 185s] ../Crypto/Sha2.c:321:34: note: 'SHA256_K' was declared here [ 185s] 321 | CRYPTOPP_ALIGN_DATA(16) uint_32t SHA256_K[64] CRYPTOPP_SECTION_ALIGN16 = { [ 185s] | ^ [ 185s] lto-wrapper: fatal error: g++ returned 1 exit status Aligning section types of Whirlpool_C and SHA256_K fixes this.
2019-08-26Windows: fix compilation error of legacy MBR bootloader caused by missing ↵Mounir IDRASSI1-1/+1
intrin.h header
2019-03-21Linux: Fix compilation error caused by wrong include of "intrin.h"Mounir IDRASSI1-3/+1
2019-03-02Windows: Generalize RAM encryption for keys to VeraCrypt binaries, ↵Mounir IDRASSI2-0/+24
especially Format and Expander
2019-03-01Windows: Implement RAM encryption for keys on 64-bit machines using ChaCha12 ↵Mounir IDRASSI7-0/+1852
cipher and t1ha non-cryptographic fast hash (https://github.com/leo-yuriev/t1ha)
2019-02-12Windows: Use Hardware RNG based on CPU timing jitter "Jitterentropy" by ↵Mounir IDRASSI8-4/+1038
Stephan Mueller as a good alternative to RDRAND (http://www.chronox.de/jent.html, smueller@chronox.de)
2019-02-08Windows: Add implementation of ChaCha20 based random generator. Use it for ↵Mounir IDRASSI12-4/+929
driver need of random bytes (currently only wipe bytes but more to come later).
2019-02-01Windows: use CPU RDRAND or RDSEED as an additional entropy source for our ↵Mounir IDRASSI7-0/+519
random generator when available
2019-02-01Fix detection of CPU features AVX2 & BMI2. Add detection of RDRAND & RDSEED ↵Mounir IDRASSI2-3/+41
CPU features. Detect Hygon CPU as AMD one.
2019-01-30Help compiler optimize some crypto code on 64-bit build since x64 capable ↵Mounir IDRASSI1-0/+5
CPUs always support SSE and SSE2
2018-08-06crypto: cleaner code for Streebog carry bit handling and add comment about ↵Mounir IDRASSI1-5/+24
missing handling of overflow caused by carry bit.
2017-11-27SIMD speed optimization for Kuznyechik cipher implementation (up to 2x ↵Mounir IDRASSI6-166/+9755
speedup). Based on https://github.com/aprelev/libgost15.
2017-07-19Windows MBR bootloader: reduce required stack size for cascade bootloader by ↵Mounir IDRASSI1-0/+2
removing unnecessary field from Twofish structure in this case.
2017-07-19Windows MBR Bootloader: workaround for 16-bit compiler internal error when ↵Mounir IDRASSI1-4/+4
compiling Camellia source code. In GET_UINT32_BE macro, we use |= operator instead of ORing shift values.
2017-07-09Windows: generate pdb files for binaries in order to help investigate ↵Mounir IDRASSI1-4/+2
crashes in the future.
2017-07-09Remove unnecessary code from Camellia assembly implementation that checks ↵Mounir IDRASSI2-71/+10
for key size since we always use it with 256-bit keys.
2017-07-09Windows: preserve volatile registers XMM6-XMM15 in 64-bit assembly of Camellia.Mounir IDRASSI1-512/+51
2017-07-04Windows: correctly handle SEH exceptions during self-tests in order to ↵Mounir IDRASSI2-30/+41
disable CPU extended features in such case.
2017-07-04Don't check for SSSE3 to use 64-bit SHA-512 assembly code since it uses only ↵Mounir IDRASSI1-0/+4
SSE2 instructions.
2017-07-04Windows Driver: correctly save and restore extended processor state when ↵Mounir IDRASSI2-9/+27
performing AVX operations on Windows 7 and later. Enhance readability of code handling save/restore of floating point state.
2017-07-04Windows: use stack instead of MMX register to save registers in 64-bit ↵Mounir IDRASSI1-14/+19
assembly implementation of SHA-512 in order to avoid issues with the driver.
2017-07-02Linux/MacOSX: align workspace stack variable in WhirlpoolTransform SSE code.Mounir IDRASSI1-1/+1
2017-07-02Avoid alignement issues with some old compilers by using movdqu instead of ↵Mounir IDRASSI1-8/+8
movdqa in SHA-256 SSE2 assembly.
2017-07-01Fix crash on machines without SSSE3 support in CPU by correctly checking for ↵Mounir IDRASSI1-1/+1
SSSE3 before using SHA-512 SSE2 assembly which uses PSHUFB instruction.
2017-07-01For code logic clarity, add check for xgetbv support in CPU before using it.Mounir IDRASSI1-1/+1
2017-06-27Enable AVX assembly instructions only when the OS implements AVX supportMounir IDRASSI1-2/+19
2017-06-27Windows: use yasm define __YASM__ for compatibility with the assembly ↵Mounir IDRASSI2-25/+25
changes done in MacOSX.
2017-06-27MacOSX: various changes for assembly files build. Don't use 32-bit assembly ↵Mounir IDRASSI11-25/+19
code of SHA-512 since it is not compatible with PIE configuration of OSX compiler (absolute addressing used)